Getting startet example

The ZSOM SDK comes with a variety of examples for all available targets. Refer to Install and upgrad SDK to get them.

The getting started example consists of code for the components listed below.
The FPGA bitfile is precompiled and enables for use without LabVIEW FPGA.
The example is biult for a generic use of the board. It can be used as starting point for a customized application.

The digital IO lines are controlled trough integer controls on the FPGA interface. One bit stands for a specific input, output or direction line. The integer values are built using the boolean array to integer conversion. The IOs are forwareded trough the FPGA and can all be controlled in the RT application. See general purpose high speed I/O, rugged digital input, and rugged open collector output fro more information about specification and usage.