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| getting_started_example [2020/06/17 15:54] – external edit 127.0.0.1 | getting_started_example [2021/09/14 16:10] – [Getting startet example] ba | ||
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| ====== Getting startet example ====== | ====== Getting startet example ====== | ||
| - | Load the example from the [[protected:download|download page]] | + | The ZSOM SDK comes with a variety of examples for all available targets. |
| + | Refer to [[zsom:upgrading_sdk|Install and upgrad SDK]] to get them. | ||
| ===== Components ===== | ===== Components ===== | ||
| Line 11: | Line 12: | ||
| The digital IO lines are controlled trough integer controls on the FPGA interface. One bit stands for a specific input, output or direction line. The integer values are built using the boolean array to integer conversion. The IOs are forwareded trough the FPGA and can all be controlled in the RT application. | The digital IO lines are controlled trough integer controls on the FPGA interface. One bit stands for a specific input, output or direction line. The integer values are built using the boolean array to integer conversion. The IOs are forwareded trough the FPGA and can all be controlled in the RT application. | ||
| - | See [[gpio_3o5V|general purpose high speed I/O]], [[gpio_input30V|rugged digital input]], and [[gpio_oc|rugged open collector output]] fro more information about specification and usage. | + | See [[zsom: |